Hardware Security

Est. read time: 2 minutes | Last updated: April 13, 2025 by John Gentile

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Contents

• Fault Injection
  • Voltage Fault Injection (Voltage Glitching)
  • Countermeasures & Mitigations
• Side Channel Analysis (SCA)
  • Power Analysis
  • Attacks & Case Studies
• FPGA-Specific Security
  • Hardware Trojans
  • Configuration Scrubbing
• References
  • To Read

Fault Injection

• An Introduction to Fault Injection - nccgroup

Voltage Fault Injection (Voltage Glitching)

• Shaping the Glitch: Optimizing Voltage Fault Injection Attacks - CHES
• Who Watches the Watchers: Attacking Glitch Detection Circuits

Countermeasures & Mitigations

• Software Countermeasures for Fault Injection Attacks - nuvoTon

Side Channel Analysis (SCA)

Power Analysis

Power analysis is a form of SCA where an attacker studies the power consumption of a cryptographic hardware device.

Attacks & Case Studies

• PACMAN - YouTube: microarchitecture side channel attack to break ARM Pointer Authentication Code (PAC).
• Screaming Channels: side-channel attack that leaks AES via analog disturbances in RF wireless signal for mixed-signal SoCs.

FPGA-Specific Security

Hardware Trojans

• FPGA-Based Protection Scheme against Hardware Trojan Horse Insertion Using Dummy Logic
• Dynamic FPGA Detection and Protection of Hardware Trojan: A Comparative Analysis

Configuration Scrubbing

Scrubbing is the periodic reprogramming, or checking, of FPGA configuration space (e.g. how Programmable Logic fabric is programmed and routed) to prevent/fix errors. These errors could be caused by radiation (e.x. FPGAs operating in a space or nuclear environment) or malicious actors.

• A Hybrid Approach to FPGA Configuration Scrubbing
• Redundant-Configuration Scrubbing of SRAM-Based FPGAs
• Configuration Scrubbing Architectures for High-Reliability FPGA Systems
• Partial Reconfiguration via Configuration Scrubbing
• Scrubbing SRAM-based FPGAs to Prevent the Accumulation of SEUs
• Programmable Scrubber for FPGAs- Micro-RDC

References

To Read

• Secure Hardware Design 6.595x: MIT’s Secure Hardware Design Class (6.5950/6.5951) is an open-source course that teaches students both how to attack modern CPUs and design architectures resilient to those attacks.
  • Secure Hardware Design - MIT CSAIL 6.888
  • CSAIL-Arch-Sec/SHD-StarterCode - GitHub
• NewAE Education & Training
  • NewAE Technology GitHub Org (Chipwhisperer, etc. designs)
• Security Engineering, 3rd Ed

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